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Santa Clara, California - USD Full Time Posted: Monday, 19 June 2017
 
 
As a member of SoC Power team, you will be involved in various stages and aspects of the power optimization efforts of mobile SOC CPU block. The main responsibility of this role is to implement/support power analysis and roll-up methodologies/flows, and debug power correlation issues. This role requires close collaboration with RTL, Physical design, Verification, Circuit and CAD teams, hence strong communication skills and teamwork skills are essential. Other responsibilities will include (but not limited to): Explore new power analysis and optimization methodologies Evaluate/Deploy power EDA tools and flows Define power vectors and benchmarks for different use cases

BSEE/MSEE required.

The candidate should have experience in SOC/CPU design and methodologies with the emphasis on power.Experience in power analysis and optimization tools and techniques, such as PowerArtist, Verdi, PT-PX and RTL/Gate simulation tools - VCS/Incisive.Strong Scripting skills in Perl, Tcl, Python, Shell.Familiarity with overall RTL-to-GDS flows: Synthesis, Simulation, P&R, STA and Verification.Good understanding of low-power SOC design principles.Familiarity with power intent - UPF/CPF.Strong communication skills and experience in working with large teams.5+ years experience.

The SOC hardware development team is looking for a Power/CAD engineer. The primary role is to set the power analysis tools/flows at RTL and gate level, implement power roll up flows and generate power analysis reports to help power optimization efforts.

As a member of SoC Power team, you will be involved in various stages and aspects of the power optimization efforts of mobile SOC CPU block. The main responsibility of this role is to implement/support power analysis and roll-up methodologies/flows, and debug power correlation issues. This role requires close collaboration with RTL, Physical design, Verification, Circuit and CAD teams, hence strong communication skills and teamwork skills are essential. Other responsibilities will include (but not limited to): Explore new power analysis and optimization methodologies Evaluate/Deploy power EDA tools and flows Define power vectors and benchmarks for different use cases

Posted by StartWire



Santa Clara, California, United States of America
Engineering
USD
Apple Inc.
Apple Inc.
JS2124_CA217835F8329D0C56EC6DD697098303_228_I/228137402
6/19/2017 9:08:22 AM

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