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Pacific Palisades, California - USD Full Time Posted: Monday, 2 December 2019
Minimum Required Skills:
Full Custom Circuit Design (ICs), SiGe BiCMOS/CMOS), Bipolar Transistor design, Block Level, Block/Top Level Floor Planning, Tapeout, Transistor Level, IC technologies (eg

Located in beautiful West Los Angeles, CA, we are a leading R&D company re-known globally for some of the most important discoveries of our generation in electronics, physics, defense, and cognitive technologies.

Join us as we push the boundaries of innovation and discovery in exciting fields like: robotics, neuromorphic designs, human-machine interaction, artificial intelligence, semiconductors, fabrication, and more.

Top Reasons to Work with Us

- HUGE Growth Opportunities
- Great Work/Life Balance/Autonomy - 9/80 work schedules - Enjoy every other Friday off!
- Very Competitive Pay
- Enjoy Amazing Ocean Views at Lunch every day!
- Incredible top of the line Facilities
- Internationally Recognized for Innovations in STEM

What You Will Be Doing

You will be leading integration, verification, design trade-offs, and carry out layout on critical performance elements. Implementation of GDSII custom IC layout for mixed signal ASICs comprised of digital netlists, large analog circuit macros, and custom foundry components. The digital netlist to GDSII implementations will follow traditional CAD based Back End flow such as floor-planning, P&R, synthesis, formal verification, clock tree insertion, and timing closure. Ability to perform top level ASIC assembly with mixed signal components, performing power analysis, load and decoupling analysis for analog references, mixed signal clocking nets, as well as ensuring successful ground plane crossings. Interface with Front End designers to assist them with customizing cad flows, Physical Design Verification methodology, and debugging LVS/DRC issues at all levels of hierarchy. This role requires a fundamental understanding of circuits and mixed signal design as well as proficiency in scripting, Back End digital flows, CAD tools, and foundry PDK formats. In addition to executing the above tasks the role is primarily for someone who can build and customize robust Back End flows, capturing the needs of both digital and analog circuit implementation and verification.

What You Need for this Position

- BS or MS., Electrical Engineering and 5+ Years of experience and knowledge of:
- CMOS and bipolar transistor design, analog circuit theory, deep sub-micron logic, and memory fault models.
- Strong background in performing full custom analog IC layout.
- Verification techniques for mixed signal VLSI ASIC designs.
- Proficient in perl/tcl/python or other Scripting language and in Verilog/VHDL and C/C++
- Track record in performing digital Back End flows: Floorplanning, placement, synthesis, timing closure, and power/area optimization
- Expert in block and top level floor planning, global power/clock routing, and pad frame construction
- Expert in CAD tools, simulation and debug tools, design databases, file formats, Back End flows
- Expert in debug and verify LVS, DRC, ERC, Density/Antenna/Stitching, taking a AISC design completely through physical design to tapeout
- Full custom circuit, block, and chip layout using Cadence Virtuoso tools, Layout L/XL, and physical verification tools Assura and Calibre
- Capable of customizing/generating standard cells for automated digital design flows
- Experience with custom device generation (eg. transistors, diodes, resistors, capacitors, MEM structures)
- Familiarity with semiconductor IC technologies (eg, SiGe BiCMOS, CMOS).
- Understanding of circuit design techniques, semiconductor device physics, signal processing,
- Experience with Linux Workstation environment
- Use diverse laboratory tools for IC evaluation and debugging

What's In It for You

For your hard work, you will be rewarded with a strong compensation package that includes a competitive base salary (D.O.E), excellent medical, dental and health benefits and other cool perks.Interviews are ongoing. Candidates with completed applications are 3x more likely to move forward to a hiring manager interview. Non-completed applications will move through HR first.

If you have all the requirements please email me at with "All boxes checked - Physical Design Engineer"

Applicants must be authorized to work in the U.S.

Security Clearance will be needed - therefore, Those authorized to work in the United States without sponsorship are encouraged to apply.s can be considered.Please apply directly to by clicking 'Click Here to Apply' with your Word resume!

Looking forward to receiving your resume and going over the position in more detail with you.

- Not a fit for this position? Click the link at the bottom of this email to search all of our open positions.

Looking forward to receiving your resume!


CyberCoders, Inc is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law.

Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire.

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Pacific Palisades, California, United States of America
12/2/2019 9:02:56 PM

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