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Job Details
Digital IP verification SV/UVM (Contract/Permanent)
Location: Bristol Country: UK Rate: As per market standard
Key Responsibilities:
1) Develop testbenches for a non-volatile memory IP
2) Creation of agents
3) Make adaptations to existing and create new tests for new features of the NVM IP
4) Show that the relevant tests are passing
5) Define verification coverage
6) Testbench Qualification using Certitude
7) Documentation of verification results
8) Proof that relevant tests are passing
9) Proof that verification coverage (structural and functional) is reached
10) Proof that the test benches have the required quality
Posted Date: 27 Mar 2024
Reference: JSSL_AUTOMATION ENGINEER IN DESIGN VERIFICATION
Company: Silicon Logic
Contact: Ash Chaurasia